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C/C++ Source or Header  |  2000-04-10  |  2KB  |  92 lines
  1. /***************************************************************************
  2.  
  3.   machine.c
  4.  
  5.   Functions to emulate general aspects of the machine (RAM, ROM, interrupts,
  6.   I/O ports)
  7.  
  8. ***************************************************************************/
  9.  
  10. #include "driver.h"
  11. #include "cpu/m6809/m6809.h"
  12.  
  13. unsigned char *ddrible_sharedram;
  14. unsigned char *ddrible_snd_sharedram;
  15. int ddrible_int_enable_0, ddrible_int_enable_1;
  16.  
  17. void ddrible_init_machine( void )
  18. {
  19.     ddrible_int_enable_0 = ddrible_int_enable_1 = 0;
  20. }
  21.  
  22. WRITE_HANDLER( ddrible_bankswitch_w )
  23. {
  24.     unsigned char *RAM = memory_region(REGION_CPU1);
  25.     int bankaddress;
  26.  
  27.     bankaddress = 0x10000 + (data & 0x0f) * 0x2000;
  28.     cpu_setbank(1,&RAM[bankaddress]);
  29. }
  30.  
  31. int ddrible_interrupt_0( void )
  32. {
  33.     if (ddrible_int_enable_0)
  34.         return M6809_INT_FIRQ;
  35.     return ignore_interrupt();
  36. }
  37.  
  38. int ddrible_interrupt_1( void )
  39. {
  40.     if (ddrible_int_enable_1)
  41.         return M6809_INT_FIRQ;
  42.     return ignore_interrupt();
  43. }
  44.  
  45. WRITE_HANDLER( int_0_w )
  46. {
  47.     if (data & 0x02)
  48.         ddrible_int_enable_0 = 1;
  49.     else
  50.         ddrible_int_enable_0 = 0;
  51. }
  52.  
  53. WRITE_HANDLER( int_1_w )
  54. {
  55.     if (data & 0x02)
  56.         ddrible_int_enable_1 = 1;
  57.     else
  58.         ddrible_int_enable_1 = 0;
  59. }
  60.  
  61. READ_HANDLER( ddrible_sharedram_r )
  62. {
  63.     return ddrible_sharedram[offset];
  64. }
  65.  
  66. WRITE_HANDLER( ddrible_sharedram_w )
  67. {
  68.     ddrible_sharedram[offset] = data;
  69. }
  70.  
  71. READ_HANDLER( ddrible_snd_sharedram_r )
  72. {
  73.     return ddrible_snd_sharedram[offset];
  74. }
  75.  
  76. WRITE_HANDLER( ddrible_snd_sharedram_w )
  77. {
  78.     ddrible_snd_sharedram[offset] = data;
  79. }
  80.  
  81. WRITE_HANDLER( ddrible_coin_counter_w )
  82. {
  83.     /* b4-b7: unused */
  84.     /* b2-b3: unknown */
  85.     /* b1: coin counter 2 */
  86.     /* b0: coin counter 1 */
  87.  
  88.     coin_counter_w(0,(data) & 0x01);
  89.     coin_counter_w(1,(data >> 1) & 0x01);
  90. }
  91.  
  92.